[LinuxPPS] [Fwd: Re: Oncore]

Paul paul at lavender-fam.net
Thu Jul 8 10:23:17 CEST 2010


No, I understand about the assert and clear, it is the data transmit and
receive I was more concerned about - buffer the data or buffer and
invert?

On Thu, 2010-07-08 at 02:10 -0600, clemens at dwf.com wrote:
> > I do notice on your schematic that you invert the transmit and receive
> > data. Is this required? I just had it buffered with no inversion.
> > 
> Im not sure about the transmit side, mabe this is a difference in the 
> definition of 1/0 for tty vs ttl.
> But for the receive side, this is just what I was pointing at when I said
> that you have to test to see if you want to use ASSERT or CLEAR.





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